The invention relates to an arrangement with self-amplifying dynamic MOS transistor storage cells as claimed in the preamble of patent claim 1.
An arrangement of self-amplifying dynamic MOS transistor storage cells of this kind is disclosed in the publication with the title .THETA.New Dynamic RAM Cell for VLSI Memories" by T. Tsuchiya and M. Itsumi in IEEE Electron. Device Letters, Vol. EDL-3, No. 1, January 1982 (pages 7 to 10). This is a storage cell with two write lines and one read line which is composed of a MOS-FET, a MOS capacitor and a junction FET.